Latch-Based Structure: A High Resolution and Self-Reference Technique for Hardware Trojan Detection

• Published in: IEEE transactions on computers Vol. 66; no. 1; pp. 100 - 113
• Main Authors: Zarrinchian, Ghobad, Zamani, Morteza Saheb
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.01.2017; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Cybersecurity; Delays; Detection; Hardware; Hardware Trojan; High resolution; latch-based structures; Logic gates; Logic testing; process variation; self-reference detection; Semiconductor device measurement; Transient analysis; Trojan horses
• ISSN: 0018-9340; 1557-9956
• DOI: 10.1109/TC.2016.2576444

Hardware Trojan detection has been the subject of many studies in the realm of hardware security in the recent years. The effectiveness of current techniques proposed for Trojan detection is limited by some factors, process variation noise being a major one. This paper introduces latch-based structures as a self-reference detection technique which uses in-circuit path delays as golden reference models. By addressing process variation, these structures can achieve high accuracy in detection resolution. The proposed method is a complementary approach to current side-channel techniques to cover their poor performance in detecting small Trojans. Simulation results show that this technique can detect small Trojans at the scale of only one logical gate with 90 percent probability on average.