Design of a Dual W- and D-Band PLL

• Published in: IEEE journal of solid-state circuits Vol. 46; no. 5; pp. 1011 - 1022
• Main Authors: Shahramian, S, Hart, A, Tomkins, A, Carusone, Anthony Chan, Garcia, P, Chevalier, P, Voinigescu, S P
• Format: Journal Article Conference Proceeding
• Language: English
• Published: New York, NY IEEE 01.05.2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Bandwidth; Capacitors; Chains; Charge pumps; Circuit properties; Circuits; Circuits of signal characteristics conditioning (including delay circuits); Consumption; D-band; Design. Technologies. Operation analysis. Testing; Digital circuits; divider chain; Dividers; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Integrated circuits; LO distribution; mm-wave ICs; Oscillators, resonators, synthetizers; Phase locked loops; Phase noise; phased-locked loop; Resonant frequency; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; SiGe BiCMOS; Silicon germanides; Tungsten; VCO; Voltage-controlled oscillators; W-band; Phase noise; Performance evaluation; Output power; Locking loop; SiGe BiCMOS; Ge-Si alloys; Microwave; Push push connection; Frequency locked loops; BiCMOS technology; Millimetric wave; phase-noise; divider chain; Charge pumping; phased-locked loop; Binary alloy; Fundamental frequency; Semiconductor alloys; Die; Arithmetic circuit; VCO, W-band; Voltage controlled oscillator; D band; Phase locked loop; D-band; mm-wave ICs; Second harmonic; Integrated circuit; W band; LO distribution; Divider
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2011.2117050

This paper describes the design considerations and performance of the highest frequency phase-locked loop (PLL) reported to date. The PLL was fabricated in a 0.13-μm SiGe BiCMOS process and integrates on a single die: a fundamental-frequency 86-92 GHz Colpitts voltage-controlled oscillator (VCO), a differential push-push 160-GHz Colpitts VCO with two differential outputs at 80 GHz, a programmable divider chain, the charge pump, and all loop filter components. It achieves the lowest W- and D-band phase noise of -93 dBc/Hz at 90 GHz and -87.5 dBc/Hz at 163 GHz, both measured at a 100 kHz offset, and demonstrates an extended locking range of 80-100 GHz at the fundamental frequency, and 160-169 GHz at the second harmonic output of the push-push VCO. The single-ended PLL output power is -3 dBm at 90 GHz and -25 dBm at 164 GHz. The chip consumes 1.25 W from 1.8 V, 2.5 V, and 3.3 V supplies and occupies 1.1 mm × 1.7 mm, including pads.