Parameterized SPICE model for a phase-change RAM device

• Published in: IEEE transactions on electron devices Vol. 53; no. 1; pp. 112 - 118
• Main Authors: Cobley, R.A., Wright, C.D.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.01.2006; Institute of Electrical and Electronics Engineers
• Subjects: Amorphous semiconductors; Applied sciences; circuit modeling; Computer simulation; Design. Technologies. Operation analysis. Testing; Devices; Electronics; Exact sciences and technology; Integrated circuit modeling; Integrated circuits; Integrated circuits by function (including memories and processors); Mathematical models; memories; phase-change random access memory (PC-RAM); Programming; Random access memories; Random access memory; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; SPICE; Spices; Switching; Transient analysis; phase-change random access memory (PC-RAM); Phase modulation; circuit modeling; Amorphous semiconductors; Random access memory; Integrated circuit; Lumped parameter circuit; memories; SPICE; Transient analysis; Modeling; Implementation
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2005.860642

A simple form of a SPICE macro model for a generic phase-change random access memory device is presented. The approach is based upon lumped parameter multiple level models. The SPICE implementation is described using a series of increasingly complex modeling blocks for dc to transient analysis. The effect of nonlinear phase switching during the programming cycle is demonstrated in a SPICE simulation and compared to experimental data.