Three-dimensional stacking IC packaging technology for NAND-flash memory

The article presents the technology of three-dimensional multi-chip packaging and testing of NAND memory module implemented at GS Nanotech in collaboration with Petrozavodsk State University. The main technological operations and quality management methods at each stage of memory modules manufacture...

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Bibliographic Details
Published inIOP conference series. Materials Science and Engineering Vol. 537; no. 3; pp. 32064 - 32068
Main Authors Perminov, V V, Putrolaynen, V V, Shtykov, A S, Yartsev, A V
Format Journal Article
LanguageEnglish
Published Bristol IOP Publishing 01.05.2019
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Summary:The article presents the technology of three-dimensional multi-chip packaging and testing of NAND memory module implemented at GS Nanotech in collaboration with Petrozavodsk State University. The main technological operations and quality management methods at each stage of memory modules manufacture are described. These memory modules can be used for solid-state drives production.
ISSN:1757-8981
1757-899X
DOI:10.1088/1757-899X/537/3/032064