Strained Silicon Nanowire Transistors With Germanium Source and Drain Stressors

We report the first demonstration of pure germanium (Ge) source/drain (S/D) stressors on the ultranarrow or ultrathin Si S/D regions of nanowire FETs with gate lengths down to 5 nm. Ge S/D compressively strains the channel to provide up to ~ 100% I Dsat enhancement. We also introduce a novel Melt-En...

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Bibliographic Details
Published inIEEE transactions on electron devices Vol. 55; no. 11; pp. 3048 - 3055
Main Authors Tsung-Yang Liow, Kian-Ming Tan, Rinus Lee, Ming Zhu, Ben Lian-Huat Tan, Balasubramanian, N., Yee-Chia Yeo
Format Journal Article
LanguageEnglish
Published New York IEEE 01.11.2008
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Channels
Drains
FETs
Germanium
Germanium stressors
Nanocomposites
Nanomaterials
Nanowires
Silicon
silicon-germanium stressors
Strain
strained silicon nanowires
Transistors
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Summary:We report the first demonstration of pure germanium (Ge) source/drain (S/D) stressors on the ultranarrow or ultrathin Si S/D regions of nanowire FETs with gate lengths down to 5 nm. Ge S/D compressively strains the channel to provide up to ~ 100% I Dsat enhancement. We also introduce a novel Melt-Enhanced Dopant diffusion and activation technique to form fully embedded Si 0.15 Ge 0.85 S/D stressors in nanowire FETs, further boosting the channel strain and achieving ~ 125% I Dsat enhancement.
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ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2008.2005153