Arch NAND Flash Memory Array With Improved Virtual Source/Drain Performance

• Published in: IEEE electron device letters Vol. 31; no. 12; pp. 1374 - 1376
• Main Authors: KIM, Wandong, JUNG HOON LEE, LEE, Jong-Ho, SHIN, Hyungcheol, PARK, Byung-Gook, YUN, Jang-Gn, CHO, Seongjae, LI, Dong-Hua, KIM, Yoon, KIM, Doo-Hyun, GIL SUNG LEE, PARK, Se-Hwan, WON BO SHIM
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.12.2010; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Arches; Arrays; Circuit properties; Compound structure devices; Concentrates; Design. Technologies. Operation analysis. Testing; Devices; Digital circuits; Disturbances; Drains; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Extended word line (WL); field concentration effect; Flash memory; Flash memory (computers); Integrated circuits; Integrated circuits by function (including memories and processors); Performance evaluation; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; SONOS devices; virtual source/drain (VSD); Performance evaluation; NAND circuit; Voltage current curve; Short channel; SONOS structure; virtual source/drain (VSD); Logic circuit; field concentration effect; Electric field; Flash memory; Non volatile memory; Integrated circuit; Concentration effect; Virtual reality; Silicon; Electron density; Extended word line (WL)
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2010.2074180

In this letter, a novel SONOS NAND Flash memory array featuring arch-shaped silicon fin and extended word lines (WL) is proposed to improve virtual source/drain (VSD) performance. The arch shape concentrates electric field, resulting in higher electron concentration at the VSD region and higher on -state cell current. In addition, the extended WL process improves the short-channel-effect (SCE) immunity and I - V characteristics. To verify these, an arch VSD NAND array device was fabricated and characterized. The integrated device shows very small SCE while obtaining high on-state cell current. Program and disturbance characteristics of the device are also confirmed.