Interfacial-Layer-Driven Dielectric Degradation and Breakdown of HfSiON/SiON Gate Dielectric nMOSFETs

• Published in: IEEE electron device letters Vol. 32; no. 10; pp. 1319 - 1321
• Main Authors: CHOI, Do-Young, KYONG TAEK LEE, BAEK, Chang-Ki, CHANG WOO SOHN, HYUN CHUL SAGONG, JUNG, Eui-Young, LEE, Jeong-Soo, JEONG, Yoon-Ha
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.10.2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Breakdown; Degradation; Dielectric breakdown; Dielectrics; Electric breakdown; Electronics; Exact sciences and technology; Gates; HfSiON; High K dielectric materials; high- k dielectric; interfacial layer (IL); Leakage current; Logic gates; MOSFETs; positive bias temperature instability (BTI) (PBTI); reliability; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon oxynitride; SiON; Stress; stress-induced leakage current (SILC); Stresses; time-dependent dielectric breakdown (TDDB); Transistors; Voltage; Thermal stress; Interfacial layer; MOSFET; Bias temperature instability; Electric stress; Tunnel effect; stress-induced leakage current (SILC); high-k dielectric; Time dependence; HfSiON; Stress effects; Silicon Nitrides oxides; positive bias temperature instability (BTI) (PBTI); Damaging; Electric breakdown; time-dependent dielectric breakdown (TDDB); Charge carrier trapping; SiON; Quaternary compound; interfacial layer (IL); Hafnium Nitrides oxides; Leakage current; High k dielectric; Reliability; NMOS technology
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2011.2161861

This letter describes the dielectric degradation and breakdown characteristics of HfSiON/SiON gate dielectric nMOSFETs using the stress-induced leakage current (SILC) analysis. The nMOSFETs show progressive breakdown (PBD) under substrate injection stress, and its characteristic changes as the stress voltage increases, from slow PBD (s-PBD) only, then to a combination of s-PBD and fast PBD (f-PBD), and finally to f-PBD only. It is found that the SILC of nMOSFETs is caused by trap-assisted tunneling mainly through the preexisting deep traps of the high- k layer and the stress-induced traps of the interfacial layer (IL). The stress-induced defects under substrate injection stress are generated within the IL rather than the high- k layer, and the time-dependent dielectric breakdown of the nMOSFETs is driven by the degradation of the IL.