Asymmetric Independent-Gate MOSFET SRAM for High Stability

• Published in: IEEE transactions on electron devices Vol. 58; no. 9; pp. 2959 - 2965
• Main Authors: Mingu Kang, Park, H. K., Wang, J., Yeap, G., Jung, S. O.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.09.2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Arrays; Asymmetric independent-gate MOSFET (IG-MOSFET); Asymmetry; Computer architecture; Delay; Design. Technologies. Operation analysis. Testing; Devices; Electronics; Exact sciences and technology; Gates; Integrated circuits; Integrated circuits by function (including memories and processors); Logic gates; Microprocessors; MOSFET circuits; MOSFETs; Random access memory; read stability; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; SRAM; Stability; Stability analysis; Static random access memory; Transistors; writeability; Cell structure; Static random access memory; MOSFET; Random access memory; Asymmetric independent-gate MOSFET (IG-MOSFET); Network architecture; SRAM; Non volatile memory; Integrated circuit; Delay time; writeability; Damaging; read stability
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2011.2160180

In this paper, the application of an asymmetric independent-gate MOSFET (IG-MOSFET) to the bit-cell structures of the SRAM schemes that were previously proposed using the symmetric IG-MOSFET is analyzed. In addition, a novel SRAM scheme with the asymmetric IG-MOSFET is proposed to improve read stability and writeability by controlling the back gates of pass-gate and pull-up transistors. New array architecture is also suggested to prevent read stability degradation in the half-selected cell, where word line is selected but bit line is unselected. The previous SRAMs with IG-MOSFET (IG-SRAMs) fail to simultaneously improve read stability and writeability compared to the SRAM with the tied-gate MOSFET. The proposed IG-SRAM significantly improves both read stability and writeability at the cost of slightly increased bit-cell area and read delay, as compared to the previous IG-SRAMs.