Integrated 1D epitaxial mirror twin boundaries for ultrascaled 2D MoS2 field-effect transistors

• Published in: Nature nanotechnology Vol. 19; no. 7; pp. 955 - 961
• Main Authors: Ahn, Heonsu, Moon, Gunho, Jung, Hang-gyo, Deng, Bingchen, Yang, Dong-Hwan, Yang, Sera, Han, Cheolhee, Cho, Hyunje, Yeo, Youngki, Kim, Cheol-Joo, Yang, Chan-Ho, Kim, Jonghwan, Choi, Si-Young, Park, Hongkun, Jeon, Jongwook, Park, Jin-Hong, Jo, Moon-Ho
• Format: Journal Article
• Language: English
• Published: London Nature Publishing Group UK 01.07.2024; Nature Publishing Group
• Subjects: 140/125; 142/126; 639/301/357/1018; 639/301/357/551; 639/925/357/995; 639/925/927/1007; Angle of reflection; Boundaries; Capacitance; Chemistry and Materials Science; Crystal defects; Crystals; Dislocations; Electron states; Epitaxy; Field effect transistors; Gates (circuits); Grain boundaries; Materials Science; Molybdenum disulfide; Nanotechnology; Nanotechnology and Microengineering; Semiconductor devices; Transistor circuits; Transistors; Twin boundaries
• ISSN: 1748-3387; 1748-3395; 1748-3395
• DOI: 10.1038/s41565-024-01706-1

In atomically thin van der Waals materials, grain boundaries—the line defects between adjacent crystal grains with tilted in-plane rotations—are omnipresent. When the tilting angles are arbitrary, the grain boundaries form inhomogeneous sublattices, giving rise to local electronic states that are not controlled. Here we report on epitaxial realizations of deterministic MoS 2 mirror twin boundaries (MTBs) at which two adjoining crystals are reflection mirroring by an exactly 60° rotation by position-controlled epitaxy. We showed that these epitaxial MTBs are one-dimensionally metallic to a circuit length scale. By utilizing the ultimate one-dimensional (1D) feature (width ~0.4 nm and length up to a few tens of micrometres), we incorporated the epitaxial MTBs as a 1D gate to build integrated two-dimensional field-effect transistors (FETs). The critical role of the 1D MTB gate was verified to scale the depletion channel length down to 3.9 nm, resulting in a substantially lowered channel off-current at lower gate voltages. With that, in both individual and array FETs, we demonstrated state-of-the-art performances for low-power logics. The 1D epitaxial MTB gates in this work suggest a novel synthetic pathway for the integration of two-dimensional FETs—that are immune to high gate capacitance—towards ultimate scaling. Mirror twin boundaries in monolayer MoS 2 —line defects with reflection-mirroring symmetry—are one-dimensionally metallic. In this work, the authors fabricate these mirror twin boundary networks by epitaxity and incorporate them into ultrascaled 2D transistor circuits as gate electrodes.