Arterial Distension Monitoring Scheme Using FPGA-Based Inference Machine in Ultrasound Scanner Circuit System

• Published in: IEEE transactions on biomedical circuits and systems Vol. 18; no. 3; pp. 702 - 713
• Main Authors: Lee, Young-Chan, Ko, Doo-Hyeon, Son, Min-Hyeong, Yang, Se-Hwan, Um, Ji-Yong
• Format: Journal Article
• Language: English
• Published: United States IEEE 01.06.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog circuits; Arterial distension monitoring; Biomedical monitoring; Blood pressure; Carotid arteries; Carotid Arteries - diagnostic imaging; Carotid Arteries - physiology; Carotid artery; Distension; field programmable gate array (FPGA); Field programmable gate arrays; Finite state machines; Humans; Image Processing, Computer-Assisted - methods; Inference; Monitoring; Probes; Resource utilization; Scanners; sequential support vector machine (SVM); Signal Processing, Computer-Assisted - instrumentation; Support Vector Machine; Support vector machines; Ultrasonic imaging; Ultrasonic scanners; Ultrasonography - instrumentation; Ultrasonography - methods; Ultrasound; ultrasound probe positioning; ultrasound scanner
• ISSN: 1932-4545; 1940-9990; 1940-9990
• DOI: 10.1109/TBCAS.2024.3363134

This paper presents an arterial distension monitoring scheme using a field-programmable gate array (FPGA)-based inference machine in an ultrasound scanner circuit system. An arterial distension monitoring requires a precise positioning of an ultrasound probe on an artery as a prerequisite. The proposed arterial distension monitoring scheme is based on a finite state machine that incorporates sequential support vector machines (SVMs) to assist in both coarse and fine adjustments of probe position. The SVMs sequentially perform recognitions of ultrasonic A-mode echo pattern for a human carotid artery. By employing sequential SVMs in combination with convolution and average pooling, the number of features for the inference machine is significantly reduced, resulting in less utilization of hardware resources in FPGA. The proposed arterial distension monitoring scheme was implemented in an FPGA (Artix7) with a resource utilization percentage less than 9.3%. To demonstrate the proposed scheme, we implemented a customized ultrasound scanner consisting of a single-element transducer, an FPGA, and analog interface circuits with discrete chips. In measurements, we set virtual coordinates on a human neck for 9 human subjects. The achieved accuracy of probe positioning inference is 88%, and the Pearson coefficient (r) of arterial distension estimation is 0.838.