Secure memristor replicator architecture with physical uncloneability

• Published in: Electronics letters Vol. 55; no. 24; pp. 1275 - 1277
• Main Authors: Yang, X, Khandelwal, S, Jabir, A
• Format: Journal Article
• Language: English
• Published: The Institution of Engineering and Technology 28.11.2019
• Subjects: Circuits and systems; conversion errors; destination memristor; lightweight architecture; memristors; nonlinear behaviour; nonlinear codes; nonlinear digital codes; physical uncloneability; physical uncloneable properties; replication process; secure memristor replicator architecture; sensed resistance; single memristor; source memristor; memristors; secure memristor replicator architecture; physical uncloneable properties; destination memristor; physical uncloneability; source memristor; sensed resistance; nonlinear digital codes; replication process; conversion errors; lightweight architecture; single memristor; nonlinear behaviour; nonlinear codes
• ISSN: 0013-5194; 1350-911X; 1350-911X
• DOI: 10.1049/el.2019.1538

A lightweight and highly versatile architecture for replicating the resistance of a source memristor into a destination memristor is presented. This can be useful for storing or backing up sensed analogue information, e.g. sensed resistance, voltage, etc. in a single memristor. The architecture, which is simple and power efficient, is also able to produce non-linear digital codes during the replication process for added security by taking advantage of the non-linear behaviour of memristors. The generated codes can also be used to retrieve the analogue value within acceptable conversion errors, with circuit elements already built into the replicator. The authors also show that the architecture demonstrates physical uncloneable properties.