Algorithm/Architecture Co-Design of 3-D Spatio-Temporal Motion Estimation for Video Coding

• Published in: IEEE transactions on multimedia Vol. 9; no. 3; pp. 455 - 465
• Main Authors: GWO GIUN LEE, WANG, Ming-Jiun, LIN, He-Yuan, SU, Drew Wei-Chi, LIN, Bo-Yun
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.04.2007; Institute of Electrical and Electronic Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithm and architecture co-design; Algorithms; Applied sciences; Architecture; Artificial intelligence; Co-design; Coding; Computer architecture; Computer programs; Computer science; control theory; systems; Computer systems and distributed systems. User interface; Costs; Electronics; Exact sciences and technology; Hardware; Integrated circuits; Integrated circuits by function (including memories and processors); Motion estimation; Pattern recognition. Digital image processing. Computational geometry; Rate-distortion; Redundancy; Searching; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Software; Software algorithms; spatio-temporal prediction; Very large scale integration; Video coding; Video sequences; VLSI architecture; Video coding; Multimedia; VLSI circuit; Circuit design; Motion estimation; High definition television; Codesign; Multipath propagation; Search time; Updating; VLSI architecture; Optimization; Image coding; spatio-temporal prediction; Algorithm and architecture co-design
• ISSN: 1520-9210; 1941-0077
• DOI: 10.1109/TMM.2006.889355

This paper presents a new spatio-temporal motion estimation algorithm and its VLSI architecture for video coding based on algorithm and architecture co-design methodology. The algorithm consists of the new strategies of spatio-temporal motion vector prediction, modified one-at-a-time search scheme, and multiple update paths derived from optimization theory. The hardware specification is for high-definition video coding. We applied the ME algorithm to H.264 reference software. Our algorithm surpasses recently published research and achieves close performance to full search. The VLSI implementation proves the low cost feature of our algorithm. The algorithm and architecture co-design concept is highly emphasized in this paper. We provide some quantitative example to show the necessity of algorithm and architecture co-design