Bifurcation analysis for third-order phase-locked loops

Second-order phase-locked loops (PLLs) are extensively used in applications related to recovering clock signals for synchronous demodulation in telecommunication networks. In situations where an improvement of the transient response of the local clocks is necessary, third-order PLLs are employed. He...

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Bibliographic Details
Published inIEEE signal processing letters Vol. 11; no. 5; pp. 494 - 496
Main Authors Monteiro, L.H.A., Filho, D.N.F., Piqueira, J.R.C.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.05.2004
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Bifurcation
Clocks
Criteria
Demodulation
Dynamical systems
Filters
Frequency synchronization
Hopf bifurcation
Mathematical analysis
Phase detection
Phase locked loops
Radar tracking
Ramps
Signal design
Signal generators
Synchronous
Voltage-controlled oscillators
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Summary:Second-order phase-locked loops (PLLs) are extensively used in applications related to recovering clock signals for synchronous demodulation in telecommunication networks. In situations where an improvement of the transient response of the local clocks is necessary, third-order PLLs are employed. Here, we use concepts taken from dynamical system theory for analytically determining the capture range of three nonlinear third-order PLLs subject to a ramp input. We show that saddle-node, saddle-saddle, and Hopf bifurcations can be produced by varying the values of the input signal velocity and of the PLL parameters, providing criteria for designing such PLLs.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:1070-9908
1558-2361
DOI:10.1109/LSP.2004.824064