Postprocessing using a single-parity interleaved block code for a Viterbi detector

A postprocessing approach is proposed which uses a single-parity, interleaved block code for correcting the errors made by a Viterbi detector. The code proposed here was simulated for an EPR4 channel with two sets of interleave depth D and code word length N with rates 39/40 and 19/20. Simulation sh...

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Bibliographic Details
Published inIEEE transactions on magnetics Vol. 40; no. 4; pp. 3090 - 3092
Main Authors Dorfman, V., Wolf, J.K.
Format Journal Article Conference Proceeding
LanguageEnglish
Published New York, NY IEEE 01.07.2004
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:A postprocessing approach is proposed which uses a single-parity, interleaved block code for correcting the errors made by a Viterbi detector. The code proposed here was simulated for an EPR4 channel with two sets of interleave depth D and code word length N with rates 39/40 and 19/20. Simulation showed a realized coding gain of 1.33 dB at a BER=10/sup -5/ and 1.59 dB at a BER=10/sup -6/ for the code with 39/40 rate. The corresponding numbers for the code with 19/20 rate are 1.54 dB and 1.76 dB.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9464
1941-0069
DOI:10.1109/TMAG.2004.830209