Via-switch FPGA with transistor-free programmability enabling energy-efficient near-memory parallel computation

• Published in: Japanese Journal of Applied Physics Vol. 61; no. SM; p. SM0804
• Main Authors: Hashimoto, Masanori, Bai, Xu, Banno, Naoki, Tada, Munehiro, Sakamoto, Toshitsugu, Yu, Jaehoon, Doi, Ryutaro, Onodera, Hidetoshi, Imagawa, Takashi, Ochi, Hiroyuki, Wakabayashi, Kazutoshi, Mitsuyama, Yukio, Sugibayashi, Tadahiko
• Format: Journal Article
• Language: English
• Published: Tokyo IOP Publishing 01.10.2022; Japanese Journal of Applied Physics
• Subjects: Application specific integrated circuits; Arithmetic and logic units; atom switch; Computer memory; crossbar; Energy efficiency; Field programmable gate arrays; Flow mapping; FPGA; near-memory computing; parallel computation; Parallel operation; Parallel processing; Reconfiguration; Semiconductor devices; Switches; Transistors; Via-switch
• ISSN: 0021-4922; 1347-4065
• DOI: 10.35848/1347-4065/ac6b81

Abstract We are developing field-programmable gate arrays (FPGAs) with a new non-volatile switch called via-switch. In via-switch FPGAs (VS-FPGAs), the via-switches required for reconfiguration are placed in the routing layer so that the entire transistor layer can be utilized for computing, and higher implementation density can be achieved compared to conventional SRAM FPGAs. Furthermore, since arithmetic units and memories for computing can be placed under the via-switch crossbar for routing, large-scale parallel operations can be realized where the memory and the arithmetic unit are adjacent to each other. These features enable operation with high energy efficiency. This article reports 65 nm prototype fabrication results and predicted the performance of the VS-FPGA designed for AI applications. We also present the developed application mapping flow and crossbar programming method. The VS-FPGA closes the gap between FPGA and application-specific integrated circuits (ASIC) with the performance advantage of the via-switch and via-switch copy scheme for FPGA-to-ASIC migration, contributing to the expansion of the FPGA usage.