Novel Multistate Quantum Dot Gate FETs Using SiO2 and Lattice-Matched ZnS-ZnMgS-ZnS as Gate Insulators

• Published in: Journal of electronic materials Vol. 42; no. 11; pp. 3156 - 3163
• Main Authors: Lingalugari, M., Baskar, K., Chan, P.-Y., Dufilie, P., Suarez, E., Chandy, J., Heller, E., Jain, F. C.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Boston Springer US 01.11.2013; Springer; Springer Nature B.V
• Subjects: Applied sciences; Characterization and Evaluation of Materials; Chemistry and Materials Science; Cross-disciplinary physics: materials science; rheology; Electrical engineering; Electronics; Electronics and Microelectronics; Exact sciences and technology; Instrumentation; Materials research; Materials Science; Nanoscale materials and structures: fabrication and characterization; Optical and Electronic Materials; Other semiconductors; Other topics in nanoscale materials and structures; Physics; Quantum dots; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Solid State Physics; Specific materials; Substrates; Transistors; multistate FETs; high; dielectric layers; II–VI barrier layers; Quantum dot gate FETs; lattice-matched gate insulators; Quantum gates; Barrier layer; Quantum dots; Field effect transistors; Digital simulation; Tunnel effect; Self-assembled layers; Thin films; Self-assembly; high-κ dielectric layers; II-VI semiconductors; Quantum mechanics; Mismatch lattice; Dielectric thin films; II―VI barrier layers; Nanostructured materials; Gates; Quantum theory
• ISSN: 0361-5235; 1543-186X
• DOI: 10.1007/s11664-013-2696-7

Multistate behavior has been achieved in quantum dot gate field-effect transistor (QDGFET) configurations using either SiO x -cladded Si or GeO x -cladded Ge quantum dots (QDs) with asymmetric dot sizes. An alternative method is to use both SiO x -cladded Si and GeO x -cladded Ge QDs in QDGFETs. In this paper, we present experimental verification of four-state behavior observed in a QDGFET with cladded Si and Ge dots site-specifically self-assembled in the gate region over a thin SiO 2 tunnel layer on a Si substrate. This paper also investigates the use of lattice-matched high- κ ZnS-ZnMgS-ZnS layers as a gate insulator in mixed-dot Si QDGFETs. Quantum-mechanical simulation of the transfer characteristic ( I D – V G ) shows four-state behavior with two intermediate states between the conventional ON and OFF states.