Impact of Band-Engineering to Performance of High-k Multilayer Based Charge Trapping Memory

Impact of band-engineering to the performance of charge trapping memory with HfO2/Ta2O5/HfO2 （HTH） as the charge trapping layer is investigated. Compared with devices with the same total HfO2 thickness, structures with Ta2O5 closer to substrates show larger program/erase window, because the 2nd HfO2...

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Published inChinese physics letters Vol. 32; no. 8; pp. 189 - 192
Main Author 刘利芳 潘立阳 张志刚 许军
Format Journal Article
LanguageEnglish
Published 01.08.2015
Subjects
Charge
Devices
Hafnium oxide
HfO2
Multilayers
Oxides
Ta2O5
Tantalum oxides
Trapping
Voltage
二氧化铪
俘获
存储器
层电荷
性能影响
能带工程
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Summary:Impact of band-engineering to the performance of charge trapping memory with HfO2/Ta2O5/HfO2 （HTH） as the charge trapping layer is investigated. Compared with devices with the same total HfO2 thickness, structures with Ta2O5 closer to substrates show larger program/erase window, because the 2nd HfO2 （next to blocking oxide） serving as part of blocking oxide reduces the current tunneling out of/in the charge trapping layer during program and erase. Moreover, trapped charge centroid is modulated and contributed more to the fiat-band voltage shift. Further experiments prove that devices with a thicker 2nd HfO2 layer exhibit larger saturate fiat-band shift in both program and erase operation. The optimized device achieves a 7 V memory window and good reliability characteristics.
Bibliography:Impact of band-engineering to the performance of charge trapping memory with HfO2/Ta2O5/HfO2 （HTH） as the charge trapping layer is investigated. Compared with devices with the same total HfO2 thickness, structures with Ta2O5 closer to substrates show larger program/erase window, because the 2nd HfO2 （next to blocking oxide） serving as part of blocking oxide reduces the current tunneling out of/in the charge trapping layer during program and erase. Moreover, trapped charge centroid is modulated and contributed more to the fiat-band voltage shift. Further experiments prove that devices with a thicker 2nd HfO2 layer exhibit larger saturate fiat-band shift in both program and erase operation. The optimized device achieves a 7 V memory window and good reliability characteristics.
11-1959/O4
LIU Li-Fang, PAN Li-Yang, ZHANG Zhi-Gang, XU Jun（ 1 1 Institute of Microelectronics, Tsinghua University, Beijing 100084 2 Graduate School at Shenzhen, Tsinghua University, Shenzhen 518055 ）
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:0256-307X
1741-3540
DOI:10.1088/0256-307X/32/8/088501