Fabrication and characterization of a nano-convex-embedded Si MOSFET for nano-scale electrical discrimination

• Published in: Japanese Journal of Applied Physics Vol. 60; no. SC; p. SCCE10
• Main Authors: Mizuno, Shintaro, Lu, Renpeng, Shimizu, Katsumi, Ueba, Yosuke, Ishikawa, Mikio, Kitamura, Mitsuru, Hoga, Morihisa, Kasai, Seiya
• Format: Journal Article
• Language: English
• Published: Tokyo IOP Publishing 01.06.2021; Japanese Journal of Applied Physics
• Subjects: Discrimination; electric discrimination; Electric potential; Embedding; MOSFET; MOSFETs; Nano-artifact metrics; nano-convex; Potential barriers; Resistance; Spatial resolution; Voltage
• ISSN: 0021-4922; 1347-4065
• DOI: 10.35848/1347-4065/abf3a0

Abstract To demonstrate electric discrimination of the nano-pattern for nano-artifact metrics, we fabricated and characterized a nano-convex-embedded Si MOSFET. The concept of electrical discrimination is to embed the nanostructure between the gate oxide and the Si channel of the MOSFET, and reflect the structure in the drain current. Spatial resolution in the channel direction is achieved by the drain voltage dependence of the channel pinch off position. The fabricated device with a nano-convex showed the increase of the on-resistance in the linear region and the increase of the drain conductance in the saturation region. These behaviors could be reproduced by the device simulation. The transfer characteristics in the subthreshold region showed the shift of the drain current curve to the positive voltage side by embedding a nano-convex. The overall behaviors were explained by the formation of a potential barrier in the channel under the nano-convex and its drain voltage dependence.