Three-mode multiplexed device based on tilted- branch bus structure using silicon waveguide

• Published in: Photonics and nanostructures Vol. 35; p. 100709
• Main Authors: Tran, Tuan Anh, Nguyen, Hang Duy Thi, Truong, Cao Dung, Nguyen, Hung Tan, Vu, Yem Van, Tran, Duc Han
• Format: Journal Article
• Language: English
• Published: Amsterdam Elsevier B.V 01.07.2019; Elsevier Science Ltd
• Subjects: Beam propagation method (BPM); Beams (radiation); Channel; Computer simulation; Crosstalk; Demultiplexing; Insertion loss; Mode (de)multiplexer; Multiplexing; Silicon; Silicon waveguide; Tiltly branched bus waveguide; Mode (de)multiplexer; Silicon waveguide; Beam propagation method (BPM); Tiltly branched bus waveguide; Channel
• ISSN: 1569-4410; 1569-4429
• DOI: 10.1016/j.photonics.2019.100709

•Having low inserting loss and crosstalk, which are smaller than 1.45 dB and –16 dB respectively.•Having a simple structure which can be easily to be masked during manufacturing process.•Having small footprint (8 μm × 950 μm), which is far less complex and more compact than many other published designs.•Having good range of fabrication tolerance and supporting wide band while maintaining desired optical performance.•Can be easily developed further with the same structure for more modes (de)multiplexing if need. We propose a new design of a silicon chip for (de)multiplexing three optical modes based on a tilted-branch bus structure using silicon waveguide. Input lights at fundamental, first-order, and second-order modes in three-dimensional space are simultaneously demultiplexed and converted to three fundamental modes at three individual output ports. The device is designed and optimized via numerical simulation using three-dimensional beam propagation method (3D-BPM). Successful three-mode demultiplexing can be achieved over 150 nm wavelength band of telecom winodws with insertion loss smaller than 1.45 dB and crosstalk below -16 dB. The proposed device also features with a small footprint (8 μm × 950 μm) and a large fabrication tolerance against chip-size variations while maintaining the desired optical performance.