Parallel programmable nonvolatile memory using ordinary static random access memory cells

A technique of using an ordinary static random access memory (SRAM) array for a programmable nonvolatile (NV) memory is proposed. The parallel NV writing of the entire array is achieved by simply applying high-voltage stress to the power supply terminal, after storing inverted desired data in the st...

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Bibliographic Details
Published inJapanese Journal of Applied Physics Vol. 56; no. 4S; pp. 4 - 04CD17
Main Authors Mizutani, Tomoko, Takeuchi, Kiyoshi, Saraya, Takuya, Shinohara, Hirofumi, Kobayashi, Masaharu, Hiramoto, Toshiro
Format Journal Article
LanguageEnglish
Published The Japan Society of Applied Physics 01.04.2017
Subjects
Arrays
Power supplies
Static random access memory
Storage
Stresses
Terminals
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Summary:A technique of using an ordinary static random access memory (SRAM) array for a programmable nonvolatile (NV) memory is proposed. The parallel NV writing of the entire array is achieved by simply applying high-voltage stress to the power supply terminal, after storing inverted desired data in the static random access memory (SRAM) array. Successful 2 kbit NV writing is demonstrated using a device-matrix-array (DMA) test element group (TEG) fabricated by 0.18 µm technology.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
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ISSN:0021-4922
1347-4065
DOI:10.7567/JJAP.56.04CD17