Fine-Grained Power-Gating Scheme of a Metal--Oxide--Semiconductor and Magnetic-Tunnel-Junction-Hybrid Bit-Serial Ternary Content-Addressable Memory

A fine-grained power-gating scheme combining metal--oxide--semiconductor (MOS) transistors with magnetic-tunnel-junction (MTJ) devices, where storage data still remains even if the power supply is cut off, is proposed for an ultra low-power bit-serial ternary content-addressable memory (TCAM). Once...

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Bibliographic Details
Published inJapanese Journal of Applied Physics Vol. 49; no. 4; pp. 04DM05 - 04DM05-5
Main Authors Matsunaga, Shoun, Natsui, Masanori, Hiyama, Kimiyuki, Endoh, Tetsuo, Ohno, Hideo, Hanyu, Takahiro
Format Journal Article
LanguageEnglish
Published The Japan Society of Applied Physics 01.04.2010
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Summary:A fine-grained power-gating scheme combining metal--oxide--semiconductor (MOS) transistors with magnetic-tunnel-junction (MTJ) devices, where storage data still remains even if the power supply is cut off, is proposed for an ultra low-power bit-serial ternary content-addressable memory (TCAM). Once a mismatched result is detected in a sequence of a bit-level equality-search operation, the power supply of all the cells in the word circuit is cut off, which greatly reduces the standby power dissipation in the word circuit. The standby power dissipation of the proposed TCAM in the standby mode is reduced to about 1.2% in comparison with that of a complementary MOS (CMOS)-only-based TCAM. Moreover, the power-delay product of the proposed TCAM is reduced to 15.5% in comparison with that of the corresponding CMOS-only-based TCAM.
Bibliography:MTJ device: (a) device structure, (b) symbol, (c) R-I characteristic of an MTJ device, (d) cross-sectional view with MOS device. Power gating: (a) Power gating in a conventional VLSI system. Steady standby power is consumed to maintain the stored data even if the VLSI system is in a standby mode. (b) Power gating in a nonvolatile logic-in-memory VLSI system. Standby power is suppressed by cutting off the supplied power. Overall structure of the proposed bit-serial TCAM. Fine-grained power-gating scheme: (a) CMOS-based bit-serial TCAM, (b) proposed bit-serial TCAM. Proposed circuits: (a) bit-serial TCAM word circuit with a fine-grained power-gating function, (b) MOS/MTJ-hybrid TCAM cell, (c) truth table of the proposed TCAM cell. Simulated waveforms of the proposed bit-serial TCAM based on fine-grained power-gating scheme.
ISSN:0021-4922
1347-4065
DOI:10.1143/JJAP.49.04DM05