Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio

An approach for the design of two-stage class-AB OTAs with sub-<inline-formula> <tex-math notation="LaTeX">1{\boldsymbol {\mu }}\text{A} </tex-math></inline-formula> current consumption is proposed and demonstrated. The approach employs MOS transistors operating in...

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Bibliographic Details
Published inIEEE transactions on circuits and systems. II, Express briefs Vol. 69; no. 7; pp. 3154 - 3158
Main Authors Beloso-Legarra, J., Grasso, A. D., Lopez-Martin, A. J., Palumbo, G., Pennisi, S.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.07.2022
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Circuits and systems
CMOS
Consumption
Direct current
Low power design
Miller compensation
MOS devices
MOSFET
MOSFETs
Power demand
Resistors
Slew rate
subthreshold operation
Transconductance
Transistors
two-stage amplifier
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Summary:An approach for the design of two-stage class-AB OTAs with sub-<inline-formula> <tex-math notation="LaTeX">1{\boldsymbol {\mu }}\text{A} </tex-math></inline-formula> current consumption is proposed and demonstrated. The approach employs MOS transistors operating in subthreshold and allows maximum gain-bandwidth product (GBW) to be achieved for a given DC current budget, by setting optimum distribution of DC currents in the two amplifier stages. Following this strategy, a class AB OTA was designed in a standard 0.5-<inline-formula> <tex-math notation="LaTeX">{\boldsymbol {\mu }}\text{m} </tex-math></inline-formula> CMOS technology supplied from 1.6-V and experimentally tested. Measured GBW was 307 kHz with 980-nA DC current consumption while driving an output capacitance of 40 pF with an average slew rate of 96 V/ms.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2022.3156401