A SPICE compatible subcircuit model for lateral bipolar transistors in a CMOS process

• Published in: IEEE transactions on electron devices Vol. 45; no. 9; pp. 1978 - 1984
• Main Authors: MacSweeney, D., McCarthy, K.G., Mathewson, A., Mason, B.
• Format: Journal Article
• Language: English
• Published: IEEE 01.09.1998
• Subjects: BiCMOS integrated circuits; Bipolar transistors; CMOS process; CMOS technology; MOSFETs; Photonic band gap; Predictive models; Semiconductor device modeling; SPICE; Substrates
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.711364

This paper describes a SPICE compatible subcircuit model of a lateral pnp transistor, which was fabricated in a 0.6 /spl mu/m CMOS process. The extraction of a dc parameter set for the lateral device is more complicated than for a vertical device because of the presence of two parasitic vertical bipolar transistors which are formed by the emitter/collector, the base and the substrate regions. The SPICE Gummel-Poon model does not predict the substrate current accurately. This paper proposes a method which involves the use of a subcircuit incorporating three SPICE Gummel-Poon models [representing one lateral and two parasitic vertical bipolar junction transistors (BJT's)]. The development of this model, its implementation and the results obtained are outlined and discussed. This circuit model is SPICE compatible and can thus be used in commercial simulators. The model provides good agreement over a wide range of measured dc data including substrate current prediction.