An FPGA-based architecture for a local tone-mapping operator

This paper presents an FPGA-based architecture for local tone mapping of gray scale high dynamic range images. The architecture is described in VHDL and has been synthesized using Altera Quartus tools. It achieves an operating frequency consistent with a video rate of 60 frames per second for a fram...

Full description

Saved in:
Bibliographic Details
Published inJournal of real-time image processing Vol. 2; no. 4; pp. 293 - 308
Main Authors Hassan, Firas, Carletta, Joan E.
Format Journal Article
LanguageEnglish
Published Heidelberg Springer Nature B.V 01.12.2007
Subjects
Algorithms
Approximation
Digital signal processors
Embedded systems
Floating point arithmetic
Frames per second
Hardware
Mapping
Signal to noise ratio
Online AccessGet full text

Cover

More Information
Summary:This paper presents an FPGA-based architecture for local tone mapping of gray scale high dynamic range images. The architecture is described in VHDL and has been synthesized using Altera Quartus tools. It achieves an operating frequency consistent with a video rate of 60 frames per second for a frame of 1,024 × 768 pixels. The proposed architecture is a modification of the nine-scale Reinhard operator. Approximations to the original Reinhard operator ensure that the operator is amenable to implementation in hardware. A peak signal-to-noise ratio study shows that our fixed-point hardware approximation produces results similar to a floating-point original.
ISSN:1861-8200
1861-8219
DOI:10.1007/s11554-007-0056-7