CMOS passive wake-up circuit for sensor network applications

A passive wake‐up circuit with high‐voltage sensitivity using standard CMOS technology has been designed and implemented.Voltage multipliers and inverter chain optimized for high‐voltage sensitivity have been proposed. A radio identification scheme to make peer‐to‐peer communication has also been pr...

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Published inMicrowave and optical technology letters Vol. 52; no. 3; pp. 597 - 600
Main Authors Kim, Hyungchul, Cho, Hanjin, Xi, Yao, Kim, Minsu, Kwon, Sungwook, Lim, Joonhyung, Yang, Youngoo
Format Journal Article
LanguageEnglish
Published Hoboken Wiley Subscription Services, Inc., A Wiley Company 01.03.2010
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Summary:A passive wake‐up circuit with high‐voltage sensitivity using standard CMOS technology has been designed and implemented.Voltage multipliers and inverter chain optimized for high‐voltage sensitivity have been proposed. A radio identification scheme to make peer‐to‐peer communication has also been proposed. The wake‐up circuit converts small‐RF input signals into a DC signal to trigger the interrupt. A duty cycle scheduling is adopted for an advanced power control. Using an RF input signal, whose center frequency is 870 MHz and input power is −29.3 dBm, we achieved an output voltage of 0.7 V, enough to trigger on the output. The fully integrated CMOS IC is fabricated using a 0.18‐μm standard CMOS process. The chip area is as small as 230 × 190 μm2. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 597–600, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24982
Bibliography:istex:717759018932EA292B10A01029B041E38472F0EB
ArticleID:MOP24982
ark:/67375/WNG-WHZ4V1J6-S
Korean government (MOST) - No. R01-2007-000-20377-0
Korea Science and Engineering Foundation (KOSEF)
ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0895-2477
1098-2760
DOI:10.1002/mop.24982