A 1.8-3 GHz-band high efficiency GaAs pHEMT power amplifier MMIC

This paper describes an S-band wideband high efficiency power amplifier based on the Nanjing Electron Device Institute＇s Ga As p HEMT monolithic microwave integrated circuit（MMIC） technology. To realize high efficiency, the two stage power amplifier is designed with a driver ratio of 1 ： 8. The low-...

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Bibliographic Details
Published inJournal of semiconductors Vol. 36; no. 12; pp. 124 - 127
Main Author 戈勤 陶洪琪 余旭明
Format Journal Article
LanguageEnglish
Published Chinese Institute of Electronics 01.12.2015
Subjects
Amplifiers
Devices
Electric potential
GaAs
GaAs pHEMT
Gallium arsenide
GHz
high efficiency
MMIC
MMIC (circuits)
PHEMT
power amplifier
Power amplifiers
Power gain
Semiconductors
wideband
功率放大器
单片微波集成电路
频段
饱和输出功率
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Summary:This paper describes an S-band wideband high efficiency power amplifier based on the Nanjing Electron Device Institute＇s Ga As p HEMT monolithic microwave integrated circuit（MMIC） technology. To realize high efficiency, the two stage power amplifier is designed with a driver ratio of 1 ： 8. The low-pass filter/high-pass filter combined matching circuit is applied to the amplifier to reduce the chip size, as well as to realize the optimum impedances over a wide bandwidth for high efficiency at each stage. Biased at class AB under a drain supply voltage of 5 V, the amplifier delivers 33–34 dBm saturated output power across the frequency range of 1.8 to 3GHz with associated power-added efficiency of 35%–45% and very flat power gain of 25–26 dB in CW mode. The size of this MMIC is very compact with 2.72.75 mm^2.
Bibliography:Ge Qin, Tao Hongqi, Yu Xuming（ Nanjing Electronic Devices Institute, Nanjing 210016, China）
11-5781/TN
wideband; MMIC; GaAs pHEMT; power amplifier; high efficiency
This paper describes an S-band wideband high efficiency power amplifier based on the Nanjing Electron Device Institute＇s Ga As p HEMT monolithic microwave integrated circuit（MMIC） technology. To realize high efficiency, the two stage power amplifier is designed with a driver ratio of 1 ： 8. The low-pass filter/high-pass filter combined matching circuit is applied to the amplifier to reduce the chip size, as well as to realize the optimum impedances over a wide bandwidth for high efficiency at each stage. Biased at class AB under a drain supply voltage of 5 V, the amplifier delivers 33–34 dBm saturated output power across the frequency range of 1.8 to 3GHz with associated power-added efficiency of 35%–45% and very flat power gain of 25–26 dB in CW mode. The size of this MMIC is very compact with 2.72.75 mm^2.
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SourceType-Scholarly Journals-1
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content type line 23
ISSN:1674-4926
DOI:10.1088/1674-4926/36/12/125003