Performance Improvement of a Virtual-Ground Nonvolatile Charge-Trap Storage nor-Type Memory Cell With Optimized Junction Dosage for 45-nm Generation Node
A variety of cell performances, such as program speed, second-bit effect, program disturbance along the channel direction (X-disturbance), and random telegraph noise (RTN), are investigated extensively under different junction dosages in a virtual-ground charge-trap nor array of 45-nm technology. Ju...
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Published in | IEEE electron device letters Vol. 32; no. 6; pp. 734 - 736 |
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Main Authors | , , , , , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.06.2011
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | A variety of cell performances, such as program speed, second-bit effect, program disturbance along the channel direction (X-disturbance), and random telegraph noise (RTN), are investigated extensively under different junction dosages in a virtual-ground charge-trap nor array of 45-nm technology. Junction profiles and the location of programmed charges are compared by means of a gate-induced drain leakage scheme. Experiments reveal that the source/drain dosage beneath gate edges affects the program speed, injected charge distribution, X-disturbance induced by secondary impact ionization, and RTN performance. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0741-3106 1558-0563 |
DOI: | 10.1109/LED.2011.2134064 |