Modeling and simulation of plasma enhanced processing for integrated circuit fabrication
Plasma processes are used extensively in deposition and etching operations used in the fabrication of integrated circuits (ICs). Modeling and simulation studies have helped improve our understanding and process design of several plasma enhanced processes. We use three examples to show that simple ch...
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Published in | Vacuum Vol. 65; no. 3; pp. 443 - 455 |
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Main Authors | , , , , |
Format | Journal Article Conference Proceeding |
Language | English |
Published |
Oxford
Elsevier Ltd
27.05.2002
Elsevier |
Subjects | |
Online Access | Get full text |
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Summary: | Plasma processes are used extensively in deposition and etching operations used in the fabrication of integrated circuits (ICs). Modeling and simulation studies have helped improve our understanding and process design of several plasma enhanced processes. We use three examples to show that simple chemical and transport models can help with process understanding and process development. Calibration of these simple engineering models is needed, but the approach can provide timely information for engineering level decisions. In the first example we show that simple models for plasma enhanced chemical vapor deposition (PECVD) of silicon dioxide from tetraethoxysilane (TEOS) were useful for several different process designs. Reactive ion etching (RIE) is another common IC fabrication process, and our second example shows how modeling revealed that one potential reason for aspect ratio dependent etching is the interaction between chemistry and transport. Finally, we show how modeling was used in support of process integration to help decide between two proposed process sequences involving deposition, etching and reflow processes. |
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ISSN: | 0042-207X 1879-2715 |
DOI: | 10.1016/S0042-207X(01)00455-9 |