Constant time dynamic programming on directed reconfigurable networks

Several dynamic programming algorithms are considered which can be efficiently implemented using parallel networks with reconfigurable buses. The bit model of general reconfigurable meshes with directed links, common write, and unit-time delay for broadcasting is assumed. Given two sequences of leng...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on parallel and distributed systems Vol. 11; no. 6; pp. 529 - 536
Main Authors Bertossi, A.A., Mei, A.
Format Journal Article
LanguageEnglish
Published New York IEEE 01.06.2000
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Algorithms
Broadcasting
Communication switching
Computer networks
Delay
Dynamic programming
Finite element method
Graph theory
Heuristic algorithms
Links
Networks
Optical interconnections
Partitioning algorithms
Switches
Very large scale integration
Online AccessGet full text

Cover

More Information
Summary:Several dynamic programming algorithms are considered which can be efficiently implemented using parallel networks with reconfigurable buses. The bit model of general reconfigurable meshes with directed links, common write, and unit-time delay for broadcasting is assumed. Given two sequences of length m and n, respectively, their longest common subsequence can be found in constant time by an O(mh)/spl times/O(nh) directed reconfigurable mesh, where h=min{m, n}+1. Moreover, given an n-node directed graph G=(V, E) with (possibly negative) integer weights on its arcs, the shortest distances from a source node /spl nu/ /spl epsiv/ V to all other nodes can be found in constant time by an O(n/sup 2/w) x O(n/sup 2/w) directed reconfigurable mesh, where w is the maximum are weight.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:1045-9219
1558-2183
DOI:10.1109/71.862204