Solid-state fault isolation devices: application to future power electronics-based distribution systems
This study addresses the timely issues of modelling, and defining selection criteria for, a solid-state fault isolation device (FID) intended for use in power electronics-based distribution systems (PEDS). This work subsequently derives the FID parameters by mapping the characteristics of a conventi...
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Published in | IET electric power applications Vol. 5; no. 6; pp. 521 - 528 |
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Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
London
Institution of Engineering and Technology
01.07.2011
The Institution of Engineering & Technology |
Subjects | |
Online Access | Get full text |
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Summary: | This study addresses the timely issues of modelling, and defining selection criteria for, a solid-state fault isolation device (FID) intended for use in power electronics-based distribution systems (PEDS). This work subsequently derives the FID parameters by mapping the characteristics of a conventional medium-voltage distribution system onto that of the PEDS envisioned under a new multi-university Engineering Research Centre. When conventional circuit breakers are used in distribution systems, they have a relatively long clearing time, causing the voltage to collapse for a significant time. A semiconductor circuit breaker, however, is expected to be able to switch fast enough to keep a voltage disturbance within acceptable limits. The main focus of this study is to address the operational issues of the interaction between the power electronic converters and the solid-state FID. The utilisation of rate of current decrease (di/dt) control during turn-off in conjunction with passive clamping devices to manage the overvoltage that results from very fast circuit breaker operation is introduced. In contrast to a simple conventional RC-snubber circuit, the proposed overvoltage management avoids high leakage current, which is the undesirable drawback of RC-snubber circuits. The presented prototype is experimentally verified with low and medium-voltage test circuits. |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISSN: | 1751-8660 1751-8679 |
DOI: | 10.1049/iet-epa.2010.0258 |