Solid-state fault isolation devices: application to future power electronics-based distribution systems

• Published in: IET electric power applications Vol. 5; no. 6; pp. 521 - 528
• Main Authors: VODYAKHO, O, STEURER, M, NEUMAYR, D, EDRINGTON, C. S, KARADY, G, BHATTACHARYA, S
• Format: Journal Article
• Language: English
• Published: London Institution of Engineering and Technology 01.07.2011; The Institution of Engineering & Technology
• Subjects: Applied sciences; Circuit breakers; Connection and protection apparatus; Devices; Electric circuits; Electric potential; Electric power generation; Electrical engineering. Electrical power engineering; Electrical machines; Electrical power engineering; Exact sciences and technology; Miscellaneous; Overvoltage; Power electronics, power supplies; Power networks and lines; Regulation and control; Semiconductors; Voltage; Power converter; Prototype; Semiconductor materials; RC circuit; Voltage fall; Power system stability; Power electronics; Fast circuit; Overvoltage; Power distribution systems; Current control; Circuit breaker; Low voltage; Snubber circuit; Electrical network; High current; Defect localization; Medium voltage; Dynamic stability; Voltage stability; Leakage current; Selector switch; Distribution network; Defect detection
• ISSN: 1751-8660; 1751-8679
• DOI: 10.1049/iet-epa.2010.0258

This study addresses the timely issues of modelling, and defining selection criteria for, a solid-state fault isolation device (FID) intended for use in power electronics-based distribution systems (PEDS). This work subsequently derives the FID parameters by mapping the characteristics of a conventional medium-voltage distribution system onto that of the PEDS envisioned under a new multi-university Engineering Research Centre. When conventional circuit breakers are used in distribution systems, they have a relatively long clearing time, causing the voltage to collapse for a significant time. A semiconductor circuit breaker, however, is expected to be able to switch fast enough to keep a voltage disturbance within acceptable limits. The main focus of this study is to address the operational issues of the interaction between the power electronic converters and the solid-state FID. The utilisation of rate of current decrease (di/dt) control during turn-off in conjunction with passive clamping devices to manage the overvoltage that results from very fast circuit breaker operation is introduced. In contrast to a simple conventional RC-snubber circuit, the proposed overvoltage management avoids high leakage current, which is the undesirable drawback of RC-snubber circuits. The presented prototype is experimentally verified with low and medium-voltage test circuits.