Agiakatsikas, D., Cetin, E., & Diessel, O. (2018). FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs. IEEE transactions on aerospace and electronic systems, 54(6), 2695-2712. https://doi.org/10.1109/TAES.2018.2828201
Chicago Style (17th ed.) CitationAgiakatsikas, Dimitris, Ediz Cetin, and Oliver Diessel. "FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs." IEEE Transactions on Aerospace and Electronic Systems 54, no. 6 (2018): 2695-2712. https://doi.org/10.1109/TAES.2018.2828201.
MLA (9th ed.) CitationAgiakatsikas, Dimitris, et al. "FMER: An Energy-Efficient Error Recovery Methodology for SRAM-Based FPGA Designs." IEEE Transactions on Aerospace and Electronic Systems, vol. 54, no. 6, 2018, pp. 2695-2712, https://doi.org/10.1109/TAES.2018.2828201.