Efficiency enhanced voltage multiplier circuit for RF energy harvesting
In this work, a simple cascading scheme is proposed for the voltage multiplier (VM) circuit used in RF-energy harvesting. As a result, two switches are eliminated from a traditional two-stage VM circuit. In practice, the traditional two-stage VM circuit is formed by cascading of two standard differe...
Saved in:
Published in | Microelectronics Vol. 48; pp. 95 - 102 |
---|---|
Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
Elsevier Ltd
01.02.2016
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | In this work, a simple cascading scheme is proposed for the voltage multiplier (VM) circuit used in RF-energy harvesting. As a result, two switches are eliminated from a traditional two-stage VM circuit. In practice, the traditional two-stage VM circuit is formed by cascading of two standard differential drive rectifiers. The conventional and proposed architectures have been designed and fabricated in a standard 0.18μm CMOS technology. The resistors of values 5kΩ, 9kΩ, 30kΩ and 100kΩ, respectively, were used to emulate practical load conditions in the measurement. The performance of the circuits was measured in terms of the power conversion efficiency (PCE), and this characterization was done for RF input power ranging from 20dBm to 0dBm. The measured results show that the power conversion efficiency performance at lower input RF power level has been improved in the proposed circuit as compared to the traditional VM circuit. In the best case, the proposed rectifier exhibits the measured maximum power conversion efficiency of 74% at the input RF level of 2dBm for the resistive load of 5kΩ. |
---|---|
Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 23 |
ISSN: | 1879-2391 0026-2692 1879-2391 |
DOI: | 10.1016/j.mejo.2015.11.012 |