The 68040 32-b monolithic processor

• Published in: IEEE journal of solid-state circuits Vol. 25; no. 5; pp. 1178 - 1189
• Main Authors: Anderson, D., DeWitt, B.C., Eisele, R.L., Gallup, M.G., Ho, Y.-W., McMahan, S.C., Marquette, D., Martin, B., Scheuer, K.C., Sood, L.C., Spohrer, T.S.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.10.1990; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Clocks; CMOS process; Delay lines; Electronics; Exact sciences and technology; Frequency; Integrated circuits; Integrated circuits by function (including memories and processors); Memory management; Phase detection; Phase locked loops; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; System buses; Timing; Processor; Circuit design; Complementary MOS technology; 32 bits processor; Transistor; Monolithic integrated circuit; Experimental study; Performance
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/4.62140

A 32-b single-chip processor has been developed that is user object-code compatible with members of the 68000 processor family. The 14-4-mm*15.5-mm device contains over 1.2 million transistors and is fabricated with a double-layer-metal CMOS process. The processor integrates three major functional units: an integer processor: a floating-point processor; and a Harvard-style memory unit. Each major unit is described, and the implementation techniques that were employed and selected circuit issues that were confronted in the design are discussed.< >