Growth of ZnO nanowire arrays directly onto Si via substrate topographical adjustments using both wet chemical and dry etching methods

• Published in: Materials science & engineering. B, Solid-state materials for advanced technology Vol. 193; pp. 41 - 48
• Main Authors: Smith, Nathan A., Evans, Jon E., Jones, Daniel R., Lord, Alex M., Wilks, S.P.
• Format: Journal Article
• Language: English
• Published: Elsevier B.V 01.03.2015
• Subjects: Array; Arrays; Catalyst free; Chemical vapor deposition; Device; Drying; Etching; Nanowire; Nanowires; Seeds; Silicon substrates; Topography; Vertical; Zinc oxide; Vertical; Array; Nanowire; Zinc oxide; Catalyst free; Device
• ISSN: 0921-5107; 1873-4944
• DOI: 10.1016/j.mseb.2014.11.008

•Arrays of catalyst-free ZnO NWs have been grown by CVD without seed layers on Si.•Si surface topography was altered by substrate etching, resulting in NW growth.•XPS analysis shows growth is related to topography and not surface contamination.•Using e-beam lithography with etching, selective nanowire growth is demonstrated.•Electrical measurements on the arrays show improved conduction through the Si. Arrays of CVD catalyst-free ZnO nanowires have been successfully grown without the use of seed layers, using both wet chemical and dry plasma etching methods to alter surface topography. XPS analysis indicates that the NW growth cannot be attributed to a substrate surface chemistry and is therefore directly related to the substrate topography. These nanowires demonstrate structural and optical properties typical of CVD ZnO nanowires. Moreover, the NW arrays exhibit a degree of vertical alignment of less than 20° from the substrate normal. Electrical measurements suggest an improved conduction path through the substrate over seed layer grown nanowires. Furthermore, the etching technique was combined with e-beam lithography to produce high resolution selective area nanowire growth. The ability to pattern uniform nanowires using mature dry etch technology coupled with the increased charge transport through the substrate demonstrates the potential of this technique in the vertical integration of nanowire arrays.