Surface Engineering of SiC through Nanogrinding and CMP
Processing silicon carbide (SiC) wafers to achieve an epi-ready quality finish typically requires many lapping and a very long chemical mechanical polishing (CMP) steps. In this paper, we report the thinning down of 6” SiC wafers to sub-nanometer surface finish in less than two hours. Three process...
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Published in | Materials science forum Vol. 924; pp. 539 - 542 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
Pfaffikon
Trans Tech Publications Ltd
05.06.2018
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Subjects | |
Online Access | Get full text |
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Summary: | Processing silicon carbide (SiC) wafers to achieve an epi-ready quality finish typically requires many lapping and a very long chemical mechanical polishing (CMP) steps. In this paper, we report the thinning down of 6” SiC wafers to sub-nanometer surface finish in less than two hours. Three process steps (rough grinding, nanogrinding and CMP) are involved. Rough grinding thins down the wafer with fast feed rate and maintain excellent flatness. Nanogrinding allows the surface finish to improve down to a few nanometers. The last CMP step provides high planarization efficiency. Overall the throughput of SiC processing is substantially increased over current market solutions. |
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Bibliography: | Selected, peer reviewed papers from the 2017 International Conference on Silicon Carbide and Related Materials (ICSCRM 2017), September 17-22, 2017, Washington, DC, USA |
ISSN: | 0255-5476 1662-9752 1662-9752 |
DOI: | 10.4028/www.scientific.net/MSF.924.539 |