A 5‐11 GHz CMOS power amplifier using Guanella‐type transmission line transformer and adaptive bias circuit

This paper presents a 5‐11 GHz fully integrated power amplifier (PA) in tsmc 0.18 μm CMOS technology. The PA utilized broadband and low‐loss Guanella differential transmission‐line transformers (DTLTs) as the input‐ and output‐matching networks to achieve broadband performance. The adaptive bias cir...

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Bibliographic Details
Published inMicrowave and optical technology letters Vol. 61; no. 1; pp. 267 - 270
Main Authors Lin, Hou‐An, Wang, Yuan‐Chang, Chiou, Hwann‐Kaeo
Format Journal Article
LanguageEnglish
Published Hoboken, USA John Wiley & Sons, Inc 01.01.2019
Wiley Subscription Services, Inc
Subjects
adaptive bias circuit
Bandwidths
Bias
Broadband
CMOS
CMOS power amplifier
differential transmission‐line transformer (DTLT)
Linearity
neutralization
Power amplifiers
Power efficiency
Power gain
Transformers
Transmission lines
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Summary:This paper presents a 5‐11 GHz fully integrated power amplifier (PA) in tsmc 0.18 μm CMOS technology. The PA utilized broadband and low‐loss Guanella differential transmission‐line transformers (DTLTs) as the input‐ and output‐matching networks to achieve broadband performance. The adaptive bias circuit was adopted to improve the linearity and power added efficiency (PAE) at power back‐off region. The power gain and stability were enhanced by capacitive unilaterialized technique. The PA achieves an output 1‐dB compression point (OP1dB) of 21.75 dBm with 1‐dB bandwidth from 5.5 to 10.5 GHz. The PAEs at peak and P1dB are 21.3% and 23.9%, respectively. The chip dimensions, including all pads, are 1.79 × 1.04 mm2.
ISSN:0895-2477
1098-2760
DOI:10.1002/mop.31510