A finite-difference procedure for the exterior problem inherent in capacitance computations for VLSI interconnections

• Published in: IEEE transactions on electron devices Vol. 35; no. 7; pp. 985 - 992
• Main Author: Zemanian, A.H.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.07.1988; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Capacitance; Capacitors; Design. Technologies. Operation analysis. Testing; Dielectrics; Electronics; Exact sciences and technology; Finite difference methods; Geometry; Integrated circuits; Laplace equations; Permittivity; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Strips; Very large scale integration; Wires; Electrical connection; Mutual coupling; VLSI circuit; Simulation; Capacitive coupling; Electrical model; Calculating method; Finite difference method
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.3355

The computation of the capacitance coefficients of VLSI interconnection wires is an example of the exterior problem for Laplace's equation. However, the geometry is of a special sort in that the wires are associated within a thin horizontal strip, and the dielectric permittivity can vary two- or three-dimensionally only within that strip; outside that strip it varies only vertically. This leads to a novel method for solving the exterior problem wherein the medium outside the strip is replaced by a set of terminating capacitors connected to nodes on the upper and lower surfaces of the strip. As a result, the number of simultaneous equations and the corresponding computer times and memory requirements are substantially reduced. Several examples are given that exhibit the accuracy of the proposed method as compared to other extant methods. Corrections to the finite-difference analysis at the corners of the wires are included.< >