Integration of GaN analog building blocks on p-GaN wafers for GaN ICs
Abstract We demonstrate the key module of comparators in GaN ICs, based on resistor-transistor logic (RTL) on E-mode wafers in this work. The fundamental inverters in the comparator consist of a p-GaN gate HEMT and a 2DEG resistor as the load. The function of the RTL comparators is finally verified...
Saved in:
Published in | Journal of semiconductors Vol. 42; no. 2; pp. 24103 - 118 |
---|---|
Main Authors | , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
Department of Electrical Engineering,KU Leuven,Leuven 3001,Belgium%imec,Leuven 3001,Belgium
01.02.2021
imec,Leuven 3001,Belgium |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | Abstract
We demonstrate the key module of comparators in GaN ICs, based on resistor-transistor logic (RTL) on E-mode wafers in this work. The fundamental inverters in the comparator consist of a p-GaN gate HEMT and a 2DEG resistor as the load. The function of the RTL comparators is finally verified by a undervoltage lockout (UVLO) circuit. The compatibility of this circuit with the current p-GaN technology paves the way for integrating logic ICs together with the power devices. |
---|---|
ISSN: | 1674-4926 2058-6140 |
DOI: | 10.1088/1674-4926/42/2/024103 |