FRESH: A New Test Result Extraction Scheme for Fast TSV Tests

Three-dimensional integrated circuits (3-D ICs) are considered to meet the performance needs of future ICs. The core components of 3-D ICs are through-silicon vias (TSVs), which should pass appropriate prebond and post-bond tests in 3-D IC fabrication processes. The test inputs must be injected into...

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Bibliographic Details
Published inIEEE transactions on computer-aided design of integrated circuits and systems Vol. 36; no. 2; pp. 336 - 345
Main Authors Park, Jaeseok, Lim, Hyunyul, Kang, Sungho
Format Journal Article
LanguageEnglish
Published IEEE 01.02.2017
Subjects
Circuit faults
Hardware
Maintenance engineering
post-bond test
prebond test
test result extraction
Testing
Three-dimensional displays
Three-dimensional integrated circuit (3-D IC)
through-silicon via (TVS) repair
Through-silicon vias
TSV test
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Summary:Three-dimensional integrated circuits (3-D ICs) are considered to meet the performance needs of future ICs. The core components of 3-D ICs are through-silicon vias (TSVs), which should pass appropriate prebond and post-bond tests in 3-D IC fabrication processes. The test inputs must be injected into the TSVs, and the test results must be extracted. This paper proposes a new test result extraction scheme [fast result extraction by selective shift-out (FRESH)] for prebond and post-bond TSV testing. With additional hardware, the proposed scheme remarkably reduces the TSV test time. FRESH avoids unnecessary test result extraction when the number of faulty TSVs in the TSV set is 0 or exceeds the number of TSV redundancies in the set. These early fault analyses are executed in the checkers of TSV groups. The experimental results show that the proposed scheme can reduce the result extraction time in practical environments.
ISSN:0278-0070
1937-4151
DOI:10.1109/TCAD.2016.2578883