An ISM band CMOS power amplifier design for WLAN
This paper describes the novel chip design and modeling of 2.4 GHz CMOS transistor Class-E power amplifier (PA) to meet IEEE 802.11b/g receiver specifications for WLAN applications. Techniques for accurate modeling of active and passive components at 2.4 GHz WLAN band are presented. The input power...
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Published in | International journal of electronics and communications Vol. 60; no. 7; pp. 533 - 538 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
Elsevier GmbH
03.07.2006
|
Subjects | |
Online Access | Get full text |
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Summary: | This paper describes the novel chip design and modeling of 2.4
GHz CMOS transistor Class-E power amplifier (PA) to meet IEEE 802.11b/g receiver specifications for WLAN applications. Techniques for accurate modeling of active and passive components at 2.4
GHz WLAN band are presented. The input power for this PA is −5
dBm. The overall layout is completed by TSMC
0.25
μ
m
radio frequency (RF) process. The post-layout simulation indicates that the power-added efficiency (PAE) is about 50.6% and this PA can generate 24.1
dBm of output power from a 1.5
V supply into a
50
Ω
load. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 1434-8411 1618-0399 |
DOI: | 10.1016/j.aeue.2005.10.017 |