Obtaining maximally flat transconductances with any number of multiple coupled differential pairs

• Published in: International journal of circuit theory and applications Vol. 39; no. 2; pp. 103 - 125
• Main Authors: Carrasco-Robles, Manuel, Serrano, Luis
• Format: Journal Article
• Language: English
• Published: Chichester, UK John Wiley & Sons, Ltd 01.02.2011
• Subjects: Asymmetry; CMOS transconductors; current mode; Diodes; Electric potential; low-voltage-low power applications; Mathematical analysis; maximally flat transconductance; MOS subthreshold operation; multiple coupled differential pairs; Semiconductor devices; Simulation; Transistors; V/I converters; Voltage
• ISSN: 0098-9886; 1097-007X; 1097-007X
• DOI: 10.1002/cta.620

This paper presents the solution to the mathematical problem of obtaining maximally flat transconductances with transconductors of multiple coupled asymmetric differential pairs. This problem has remained unresolved until now and this solution provides an extremely fast an easy way to obtain the transistor asymmetries and tail current factors. General expressions for the differential output current and the transconductance for any number of pairs are deduced. Likewise, the compatibility of this linearization technique with both source degeneration via diode connected transistors and the use of back‐gate offset voltages is analysed. A designer's guide showing the way of modifying the theoretical parameters in order to be used in simulation is also proposed and finally, as a proof of concept, simulated results of several configurations with 10 coupled differential pairs are given. Copyright © 2009 John Wiley & Sons, Ltd.