Channel Engineering of Normally-OFF AlGaN/GaN MOS-HEMTs by Atomic Layer Etching and High- \kappa Dielectric

• Published in: IEEE electron device letters Vol. 39; no. 9; pp. 1377 - 1380
• Main Authors: Hu, Qianlan, Li, Sichao, Li, Tiaoyang, Wang, Xin, Li, Xuefei, Wu, Yanqing
• Format: Journal Article
• Language: English
• Published: IEEE 01.09.2018
• Subjects: Aluminum gallium nitride; Atomic layer deposition; atomic layer etching; Dielectrics; Etching; GaN MOS-HEMTs; gate recess; high-κ dielectric; Leakage currents; Logic gates; normally-off; Wide band gap semiconductors
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2018.2856934

In this letter, normally-OFF AlGaN/GaN metal-oxide-semiconductor high-electron-mobility transistors with a threshold voltage of 2.2 V have been achieved by an atomic layer etching technique. Combined with surface passivation by atomic layer deposition of composite HfSiO high-<inline-formula> <tex-math notation="LaTeX">\kappa </tex-math></inline-formula> gate dielectric, a well-controlled gate-recess process with minimized surface damage results in improved interface properties with a low interface trap density of <inline-formula> <tex-math notation="LaTeX">2.8\times 10^{11} </tex-math></inline-formula> eV −1 cm −2 and suppressed gate leakage current with a high current on/off ratio over 10 11 . A maximum current density of 518 mA/mm with an ON-resistance of 10.1 <inline-formula> <tex-math notation="LaTeX">\Omega \cdot \textsf {mm} </tex-math></inline-formula> and a high breakdown voltage of 1456 V at an OFF-state current density of <inline-formula> <tex-math notation="LaTeX">1~\mu \text{A} </tex-math></inline-formula>/mm are also achieved. In the meantime, the dynamic <inline-formula> <tex-math notation="LaTeX">{\text {R}}_{\mathrm {on}} </tex-math></inline-formula> is only 1.2 times the static <inline-formula> <tex-math notation="LaTeX">{\text {R}}_{\mathrm {on}} </tex-math></inline-formula> after OFF-state drain voltage stress of 120 V and 2.6 times after 300-V stress.