Flexible VLSI architectures for Galois field multipliers

Galois field (GF) multipliers play a major role in the engineering applications such as cryptography and error correcting codes. This paper proposes systolic vector m-bit GF(p) and GF(2m) multipliers (m=log2p), where four numbers of m2-bit GF multiplications can be done in parallel. Similarly, twelv...

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Bibliographic Details
Published inIntegration (Amsterdam) Vol. 59; pp. 109 - 124
Main Authors Basiri M, Mohamed Asan, Shukla, Sandeep K.
Format Journal Article
LanguageEnglish
Published Amsterdam Elsevier B.V 01.09.2017
Elsevier BV
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Summary:Galois field (GF) multipliers play a major role in the engineering applications such as cryptography and error correcting codes. This paper proposes systolic vector m-bit GF(p) and GF(2m) multipliers (m=log2p), where four numbers of m2-bit GF multiplications can be done in parallel. Similarly, twelve and sixteen numbers of GF(2m4) and m4-bit GF(p) multiplications can be done in parallel respectively. Also, this paper proposes non vector flexible GF(2m) and m-bit GF(p) multipliers, where the m can be varied from 2 to the maximum allowable value. Our proposed systolic vector parallel GF(216) multiplier achieves 95.8% of improvement in throughput over reconfigurable bit serial design [7]. Similarly, the proposed systolic vector parallel 16-bit GF(p) multiplier achieves 82.5% of improvement in throughput over reconfigurable bit serial design [23] using 45nm CMOS technology. •Galois multipliers play a major role in the engineering applications such as cryptography and error correcting codes.•This paper proposes vector GF(2m) and m-bit GF(p) multipliers to perform more smaller multiplications in parallel.•Thus the proposed systolic GF(2m) and m-bit GF(p) multipliers can be used in SIMD applications.•Also, this paper proposes non vector flexible GF(2m) and m-bit GF(p) multipliers, where the m can be varied from 2 to max.•Also, this paper proposes dual field systolic vector multipliers in the same line of proposed GF(p) multipliers.
ISSN:0167-9260
1872-7522
DOI:10.1016/j.vlsi.2017.06.009