A new current-mode computational analog block free from the body-effect

• Published in: Integration (Amsterdam) Vol. 65; pp. 18 - 31
• Main Authors: Nikseresht, Sasan, Azhari, Seyed Javad
• Format: Journal Article
• Language: English
• Published: Amsterdam Elsevier B.V 01.03.2019; Elsevier BV
• Subjects: Analog; CMOS; Computation; Computational analog block; Computer simulation; Configurable analog block; Current-mode circuit; Exponential functions; Field programmable gate arrays; Mathematical analysis; Metal oxide semiconductors; MOS translinear principle; MOSFET body-effect; Nonlinear systems; Rectifiers; Semiconductor devices; Signal processing; Software; Switching theory; Transistors; Configurable analog block; Computational analog block; MOS translinear principle; MOSFET body-effect; Current-mode circuit
• ISSN: 0167-9260; 1872-7522
• DOI: 10.1016/j.vlsi.2018.10.008

In this paper, a new computational/configurable analog block (CAB) is presented based on MOS translinear (MTL) for current-mode nonlinear computation. The proposed CAB architecture consists of three main structures: a new MTL cell, NMOS-PMOS arrays, and two local switch networks. As the new trait, it benefits from an effective compensation technique that extensively minimizes the error generated by body effect–the most important factor amongst the second-order effects. The second feature is that the MTL cell only with six transistors has enabled the CAB to implement more arithmetic functions. This block is capable of implementing such various nonlinear functions as squaring, inverse function, N-dimensional vector summation, full-wave rectifier, four-quadrant multiplier/divider, two-quadrant square-root, and exponential functions. The proposed CAB is simulated with CADENCE and HSPICE software in 0.18 μm TSMC CMOS technology at 1.8 V supply voltage. Most importantly, Post-layout plus Monte Carlo, corner case, and temperature variation simulations are performed to investigate its robust performance in the presence of PVT fabrication non-idealities. Functionality and flexibility of the proposed CAB make it suitable for the core block of Field-Programmable Analog Array (FPAA) ICs and signal processing applications. •Design a new computational/configurable analog block (CAB).•The CAB has an ability to implementing more arithmetic functions.•Functionality and flexibility of the CAB make it suitable for FPAA applications.•The CAB benefits from a technique that minimizes the body-effect's error.