Millimeter wave wireless interconnects in deep submicron chips: Challenges and opportunities

• Published in: Integration (Amsterdam) Vol. 64; pp. 127 - 136
• Main Authors: Gade, Sri Harsha, Ram, Shobha Sundar, Deb, Sujay
• Format: Journal Article
• Language: English
• Published: Amsterdam Elsevier B.V 01.01.2019; Elsevier BV
• Subjects: Antennas; Bandwidths; Circuit design; Design optimization; Link performance; Millimeter waves; Networks; On-chip wireless interconnects; Path loss; Performance enhancement; System on chip; Transceivers; Wireless channel; Wireless communications; Wireless networks; On-chip wireless interconnects; Path loss; Wireless channel; Link performance
• ISSN: 0167-9260; 1872-7522
• DOI: 10.1016/j.vlsi.2018.09.004

On-chip wireless links offer the most promising solution to improve performance over traditional Networks-on-Chip (NoCs). Though, significant advancements are being made to support intra-chip wireless communication, a complete understanding of on-chip wireless channel, that facilitates design optimization of transceivers and antennas is still lacking. In this work, we derive on-chip wireless channel characteristics, taking into account antenna implementation, near field and multipath propagation effects. These observations are then used to study impact on wireless NoC performance, packet energy, delay and bandwidth. The study provides crucial insights for circuit designers to tune transceiver and antenna specifications to achieve desired network performance. •Detailed study of wireless propagation in intra-chip environments to understand transmission challenges in WNoC.•A 3D multi-layered chip model to understand near field, multipath propagation and antenna implementation effects on wireless channel.•Analysis of impact of metal links on propagation and novel antenna implementation over cavity region to improve efficiency.•Estimation of channel path loss, delay spread and propagation delay and their impact on WNoC performance.•Design guidelines for antennas, transceiver and system level implementation for optimal performance of WNoCs.