Three-dimensionally stacked poly-Si TFT CMOS inverter with high quality laser crystallized channel on Si substrate

• Published in: Solid-state electronics Vol. 52; no. 3; pp. 372 - 376
• Main Authors: Oh, Soon-Young, Ahn, Chang-Geun, Yang, Jong-Heon, Cho, Won-Ju, Lee, Woo-Hyun, Koo, Hyun-Mo, Lee, Seong-Jae
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Oxford Elsevier Ltd 01.03.2008; Elsevier Science
• Subjects: 3D stacked poly-Si; Applied sciences; Design. Technologies. Operation analysis. Testing; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; Integrated circuits; Laser crystallized channel; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Transistors; Two-layer CMOS inverter; Vertical integration; Laser crystallized channel; Two-layer CMOS inverter; 3D stacked poly-Si; Vertical integration; Interfacial layer; Inverter; Transient response; MOSFET; Polycrystal; PMOS technology; Transfer characteristic; Silicon on insulator technology; Direct current; Complementary MOS technology; Dielectric thin films; Silicon; MOS transistor; Thin film transistor; CMOS integrated circuits; NMOS technology; Wafer; Electrical characteristic
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2007.10.020

3D stacked poly-Si CMOS inverters with a high quality laser crystallized channel were fabricated on bulk Si wafers. In order to fabricate 3D stacked poly-Si CMOS inverters, the PMOS thin-film-transistor (TFT) at upper poly-Si layer were stacked on the NMOS TFT at lower poly-Si layer and interlayer dielectric film. After laser crystallization, grains in poly-Si films were very uniform and the dominant crystalline orientation was (1 1 1) direction. The sub-threshold swing of NMOS and PMOS TFTs was very good, showing 78 mV/dec. and 86 mV/dec., respectively. And the maximum/minimum current ratio of both TFTs was larger than 10 7 which is equivalent to those at the bulk or SOI MOSFET. The DC voltage transfer characteristics and transient characteristics of stacked poly-Si CMOS inverter were good enough for the vertical integrated CMOS applications. We verified the feasibility of 3D stacked CMOS inverter circuit by poly-Si TFT technology.