Study of a novel Si/SiC hetero-junction MOSFET

A new device is proposed that utilizes a Si/SiC hetero-junction to potentially overcome one of the major issues holding back the development of SiC MOSFET technology. The proposed device makes use of a thin epitaxial layer of silicon grown on a SiC substrate, on which a high-quality MOS structure ca...

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Bibliographic Details
Published inSolid-state electronics Vol. 51; no. 5; pp. 662 - 666
Main Authors Chen, L., Guy, O.J., Jennings, M.R., Igic, P., Wilks, S.P., Mawby, P.A.
Format Journal Article
LanguageEnglish
Published Oxford Elsevier Ltd 01.05.2007
Elsevier Science
Subjects
Applied sciences
Compound structure devices
Electronics
Exact sciences and technology
Hetero junction
MOSFET
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
SiC
Transistors
MOSFET
Hetero junction
SiC
Si
Electric breakdown
Doped materials
MOS structure
Numerical method
Thin film
Si junctions
Breakdown voltage
p type semiconductor
Numerical simulation
Silicon
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Summary:A new device is proposed that utilizes a Si/SiC hetero-junction to potentially overcome one of the major issues holding back the development of SiC MOSFET technology. The proposed device makes use of a thin epitaxial layer of silicon grown on a SiC substrate, on which a high-quality MOS structure can be fabricated. Doped p-type wells in both the silicon and SiC epitaxial layers ensure that the blocking region is contained entirely within the SiC substrate, thus maximising the breakdown voltage of the device. In this study, numerical modelling methods have been applied to a Si/SiC hetero-junction MOSFET structure in order to investigate its feasibility and potential benefits over conventional SiC MOSFETs. Preliminary results on growth of thin silicon layers on SiC – which would be used in fabrication of the real device – are also reported.
ISSN:0038-1101
1879-2405
DOI:10.1016/j.sse.2007.02.026