On the optimization and design of SiGe HBT cascode low-noise amplifiers

• Published in: Solid-state electronics Vol. 49; no. 3; pp. 329 - 341
• Main Authors: Liang, Qingqing, Niu, Guofu, Cressler, John D., Taylor, Stewart, Harame, David L.
• Format: Journal Article
• Language: English
• Published: Oxford Elsevier Ltd 01.03.2005; Elsevier Science
• Subjects: Amplifiers; Applied sciences; Cascode; Circuit properties; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Input third-order intercept point (IIP3); LNA; Noise figure; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; SiGe HBTs; Theoretical study. Circuits analysis and design; Transistors; Volterra series; Cascode; Noise figure; Volterra series; SiGe HBTs; Input third-order intercept point (IIP3); LNA; Semiconductor alloys; Circuit design; Low noise amplifier; Cascode connection; Linear circuit; Non linear phenomenon; Optimal design; Network analysis; Analytical method; Capacitance; Numerical simulation; Heterojunction bipolar transistors
• ISSN: 0038-1101; 1879-2405
• DOI: 10.1016/j.sse.2004.10.002

This work presents a new design methodology for inductively-degenerated cascode low-noise amplifiers using advanced epitaxial-base SiGe HBTs. IIP3 and noise figure are simulated using a calibrated linear circuit analysis and Volterra series methodology as a function of the two major design variables: emitter geometry and biasing current. Analytical IIP3 expressions with/without the CB capacitance are derived and used to explain the numerical simulation results. The cancellation among individual non-linearities is maximized at a certain I C and emitter length combination, thus producing an IIP3 peak. The analytical expressions are in good agreement with the numerical simulation results, and can be used for robust circuit design.