Intelligent power IC with partial SOI structure

• Published in: Japanese Journal of Applied Physics Vol. 34; no. 2B; pp. 864 - 868
• Main Authors: YAMAGYCHI, H, HIMI, H, FUJINO, S, HATTORI, T
• Format: Conference Proceeding Journal Article
• Language: English
• Published: Tokyo Japanese journal of applied physics 01.02.1995
• Subjects: Applied sciences; Design. Technologies. Operation analysis. Testing; Electronics; Exact sciences and technology; Integrated circuits; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Electric noise; Thermal characteristic; Power circuit; Cross section; Temperature effect; Shielding; Experimental study; Chip; Time voltage characteristic; Thin film; Silicon on insulator technology; Microelectronic fabrication; Multichannel circuit; Electromagnetic interference; Energy dissipation; Integrated circuit; MOS transistor; Vertical transistor; Intelligent system; Electrical characteristic; Double diffusion; Microcomputer; Production process
• ISSN: 0021-4922; 1347-4065
• DOI: 10.1143/jjap.34.864

In the integration of power devices and control circuits, temperature rise caused by the heat dissipation of power devices and electric interference between power devices and control circuits are important problems. In this report, the following was demonstrated by using the partial silicon-on-insulator (SOI) structure with shielding layers. The partial SOI structure has the Si directly bonded areas where power devices are formed and SOI areas where control circuits are formed. Firstly, the temperature rise was reduced to about a half that in the complete SOI structure, and the latch-up occurrence in the control circuit was prevented by the insertion of shielding layers. Secondly, at the condition of 150° C and 16 V, the normal operation of an intelligent power IC consisting of multichannel power devices and a 1-bit microcomputer was accomplished.