A Gain/Efficiency-Improved Serial-Parallel Switched-Capacitor Step-Up DC-DC Converter

• Published in: IEEE transactions on circuits and systems. I, Regular papers Vol. 60; no. 10; pp. 2799 - 2809
• Main Authors: Chang, Yuen-Haw, Kuo, Song-Ying
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.10.2013; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Adaptive-conversion-ratio (ACR); Capacitance; Capacitors; Cascades; Charge pumps; Computing time; Converters; Design engineering; Efficiency; Gain; Generators; Pulse duration modulation; Pulse width modulation; Ripples; serial-parallel switched-capacitor converter; Steady-state; step-up DC-DC conversion; Studies; Switches; Topology
• ISSN: 1549-8328; 1558-0806
• DOI: 10.1109/TCSI.2013.2248833

A new scheme of a gain/efficiency-improved serial- parallel switched-capacitor converter (SPSCC) is proposed by combining an adaptive-conversion-ratio (ACR) and pulse-width- modulation (PWM) control for step-up DC-DC conversion. For improving gain, the power part consists of one m c -stage cell and one n c -stage cell in cascade to obtain the step-up gain of (m c +1)×(n c +1) at most. For improving efficiency, the ACR control with adapting stage number m,n is presented to select a proper gain of (m+1)×(n+1) ( m=1,2,...,m c , n=1,2,...,n c ) according to the desired output. Further, the PWM control is adopted to enhance output regulation as well as robustness to source/loading variation. Some theoretical analysis and control design include: formulation, steady-state analysis, conversion ratio, efficiency, output ripple, stability, capacitance selection, and control design. Finally, the performance of this scheme is verified experimentally on a SPSCC prototype, and all results are illustrated to show the efficacy of this scheme.